Why AI Compute Centers Use Fiber: The Copper Wall at 800G

Ask why an AI compute center is wired with fiber and you will usually get a one-line answer: fiber has more bandwidth. That answer is true, incomplete, and it hides the actual engineering decision. The real story is a moving boundary. Every time serial lane speed climbs a generation, copper's usable reach shrinks, and the point where you are forced to convert to light marches inward — from the building, to the row, to the rack, and now onto the circuit board itself. NVIDIA's own DSX POD makes the split visible: a single container carries roughly 20 km of NVLink copper for the scale-up domain inside the rack, and roughly 17 km of Spectrum-X fiber for everything that leaves it [5].

This article walks through the six reasons fiber owns the scale-out network in an AI facility, the one place copper still wins and will keep winning for years, and the practical specification work — media ladder, loss budget, connector polarity, contamination control — that turns the physics into a procurement package.

Reason 1: copper's reach collapses with every lane-speed generation

Copper does not fail suddenly. It gets squeezed, predictably, by physics. Skin effect, dielectric loss and inter-symbol interference all scale with frequency, and PAM4 modulation stacks four amplitude levels onto a signal that used to carry two bits, so the eye that a receiver has to resolve gets smaller while the channel gets noisier. The consequence is a shrinkage table that the whole industry now designs around [1][4][5]:

SerDes generation	Modulation	Max passive DAC reach	What copper can still cover
10G	10G NRZ	~7 m	Almost anywhere in a room
25G / 40G	NRZ	~5 m	Rack to rack
100G	100G PAM4	~3 m	In-rack or adjacent rack
400G	8×50G PAM4	~2–3 m	In-rack only; AEC to ~5 m
800G	8×112G PAM4	~1–2 m	GPU tray to top-of-rack, marginally
1.6T	8×224G PAM4	~1 m	Too short for one rack

Two facts make this concrete rather than academic. First, at 224G per lane the signal attenuates so severely that it barely survives an inch of conventional PCB trace before the equalizer runs out of margin [5] — which is why 224G switch designs route the SerDes through "overpass" cabled assemblies that jump from the ASIC substrate straight to the faceplate, bypassing the board entirely [1]. Second, the practical requirement has not shrunk with it. A dense AI rack still needs about 2 m of vertical run between a GPU tray at the bottom and a top-of-rack switch, and an end-of-row or leaf-to-spine hop needs 10–100 m. Ordering a 3 m passive DAC for an 800G deployment is one of the most common procurement mistakes in this market precisely because 3 m was standard at 400G and simply does not train at 800G [1].

Active electronics push copper back a few metres. An active electrical cable puts a retimer or a low-power DSP inside the connector shell and restores the eye, extending reach to roughly 2.5–3 m as standard and, with the newest 224G-class retimers, to as much as 7 m [4][5]. That is enough to hold the inside of a rack. It is not enough to hold a row, a pod, or a campus. Past the copper boundary there is only one medium, and it is glass.

Reason 2: the optical layer has become a line item the CFO reads

Reach decides whether you can build the fabric. Power decides whether you can afford to run it. This is the part of the fiber story that changed most in the last three years.

The structural problem is that transceiver efficiency has not tracked switch efficiency. Between 2010 and 2022, aggregate data center switch bandwidth grew about 80-fold while switch chip power grew roughly 8-fold — but optical module power grew about 26-fold and switch SerDes power about 25-fold over the same period [4]. The optics are falling behind the silicon they serve, and at 51.2T and beyond the gap is no longer absorbable: Broadcom states plainly that pluggable optical transceivers consume approximately 50% of system power and constitute more than 50% of the cost of a traditional switch system [3].

Put a number on a single switch. A 64-port 51.2T switch fully populated with 800G retimed modules at roughly 16 W each draws about 1,024 W from its transceivers alone, on top of roughly 400–500 W for the switch ASIC — call it 1.5 kW for one box [1]. A pod has dozens of those boxes.

Scale it to a cluster. A 30,528-GPU AI fabric with one optical port per GPU has two modules per link, one at each end. At 13.6 W per 800G module that is 30,528 × 2 × 13.6 W ≈ 830 kW of interconnect power — 27.3 W per GPU before a single FLOP is produced. Broadcom's own cluster modelling, presented at ECOC 2024, puts the same class of cluster at 832 kW for DSP-based pluggables versus 366 kW with co-packaged optics, a 56% reduction, and at 16.2 kW down to 7.1 kW for an NVL576 scale-up domain [12]. That saving is the difference between a campus that fits inside a 150 MW interconnection and one that does not.

This is where the fiber conversation becomes an architecture conversation, because "optical" is not one design. The module families differ mainly in what they do with the digital signal processor, which accounts for roughly 40–50% of a retimed module's power [7][8]:

Architecture	Power per 800G port	Module latency	What it trades away
Passive DAC	~0 W	Sub-ns	Reach (1–3 m)
AEC (retimed copper)	12–18 W	Low	Reach (2.5–9 m), connector heat
Retimed pluggable optic	14–18 W	Tens to ~100 ns	Power, latency — nothing else
LPO (linear pluggable)	5.5–10 W	Single-digit ns	Reach (<500 m), host SerDes dependency
CPO (co-packaged)	~5–9 W	Lowest	Serviceability, port-level upgrade

LPO strips the DSP out of the pluggable and hands equalization, clock recovery and FEC to the host switch SerDes. Cisco demonstrated roughly a 700 W system-level reduction on a 51.2T Silicon One switch by comparing fully retimed and fully LPO port populations, and the same switch that drew over 1,000 W with 64 retimed modules draws closer to 500 W with LPO [6]. CPO goes further by moving the optical engine onto the switch substrate itself, eliminating the long board-level electrical channel: Broadcom's Bailly integrates eight 6.4T silicon photonics engines with a Tomahawk 5 switch chip and delivers a 70% reduction in optical interconnect power plus an 8× improvement in silicon area efficiency [3].

The reason fiber still owns the scale-out network after all of this is simple: LPO and CPO are cheaper ways to do optics, not ways to avoid it. They reduce the tax; they do not repeal the physics that makes copper unusable past a few metres.

Reason 3: weight, bulk and the airflow you cannot buy back

The third reason is mechanical, and it is the one most often missing from a request for quote. A high-speed copper cable is not a wire; it is a shielded bundle of precision twinax with controlled impedance, and the physical cross-section it needs at 800G is substantial:

Cable type	Outer diameter	Weight per metre	Min bend radius
Passive DAC	10–14 mm	~45 g/m	100–140 mm
AEC	5–7 mm	~20 g/m	30–50 mm
AOC / fiber assembly	3–4 mm	~9 g/m	~30 mm

Three consequences follow, and they compound at scale [1][2]:

• Cross-section. Sixty-four 12 mm DACs exiting one switch faceplate occupy about 7,240 mm² of cable cross-section. The same 64 ports on 3.5 mm fiber occupy about 620 mm² — an 11.7× reduction in the exact region where front-to-back airflow crosses the faceplate.
• Thermal. In racks above 30 kW, 8–10 mm DAC and ACC bundles raise transceiver case temperatures by 5–10 °C compared with 3–4 mm optical cables, pushing modules toward their thermal limits exactly where heat concentrates — the upper switch ports [2].
• Mass. One thousand 3 m links weigh about 135 kg as DAC, 60 kg as AEC, and 27 kg as fiber. At the 73,728 cables that a 32,256-GPU three-tier cluster needs [1], the difference is measured in tonnes of tray loading and install labor.

NVIDIA's DGX SuperPOD design guidance makes the scale explicit: a single Scalable Unit of 248 GPUs needs 508 compute network cables, and four units — 1,016 GPUs — need 2,044 of them, with recommendations to keep cable tray fill at or below 50% and to separate data and power trays by about 12 inches [1]. Fiber's 3–4 mm diameter and 30 mm bend radius are what make those rules satisfiable in a 40–140 kW rack; copper's geometry is what makes them hard.

Reason 4: latency — the honest version

Fiber is widely assumed to be faster than copper. In propagation terms it is not. Light in single-mode glass travels at roughly 4.9 ns per metre (refractive index ~1.47), while a signal on high-quality twinax with a velocity factor of 0.7–0.8 travels at about 4.2–4.8 ns per metre. Over a 3 m link the propagation difference is a nanosecond or two, in copper's favour. Propagation delay is not why fiber loses and wins.

The latency that matters is silicon. A retimed optical module's DSP adds processing delay on the order of tens of nanoseconds and up to roughly 100 ns depending on architecture [6][7]; removing it with LPO brings module latency down to single-digit nanoseconds, a reduction some implementations put near 90% [6]. Co-packaged optics go lower still by removing the board-level electrical channel entirely.

Whether that matters depends on what the fabric does. AI training is collective communication: all-reduce and all-gather operations launch across many hops, and each hop pays the module latency at both ends plus switch latency. On a leaf-spine-leaf path that is three link hops — six module latencies. At ~100 ns per retimed module that is ~600 ns of fixed, bandwidth-independent delay per collective; at single-digit nanoseconds it is ~50 ns. Bandwidth does not fix this, because it is a serialization-latency floor that every small collective message pays, and collective launch frequency scales with model and topology, not with link speed. The honest framing: for large gradient transfers, bandwidth dominates and the DSP latency is noise; for the enormous number of small collectives in a training step, it is a real but second-order term. Specify it deliberately rather than discovering it in a profiler.

Reason 5: fiber does not carry electricity, ground, or fault current

The fifth reason is the one that shows up late in a project, usually as an intermittent problem nobody can reproduce: glass is a dielectric, and copper is not.

Every copper link carries a ground reference between the two ends it connects. In a modular or containerized compute campus — where modules land on separate transformers, separate PDUs and increasingly separate 800 VDC power domains — the racks on either side of a long copper run are not at exactly the same potential. That difference rides on the cable shield as common-mode noise, and in a facility full of variable-frequency drives, coolant pumps and high-power rectifiers the noise floor is not benign. Fiber breaks the galvanic path completely: no ground loop, no common-mode coupling, no shield current.

The same property covers EMI and surge. A copper run between buildings or between separately grounded structures is an antenna during a lightning event, which is why bonding and surge protection dominate the verification checklist for containerized deployments — and why inter-building copper data runs are an avoidable liability. Fiber has no such failure mode, and it cannot propagate a fault current from one rack to another. In an AI hall where the electrical environment is louder every generation, isolation is not a nicety; it is why the fiber plant stays quiet while everything around it does not.

Reason 6: the fiber plant outlives every transceiver you plug into it

The last reason is financial, and it is the one that should shape a cabling order today. Copper assemblies are generation-locked: a 112G passive DAC is a tuned channel that does not become a 224G DAC, and when the switch generation turns over, the copper turns over with it. Structured single-mode fiber does not.

OS2 fiber installed for 800G DR8 links will carry 1.6T, and the same trunks will serve the generation after that [1]. The practical instruction that follows is blunt: install 16-fiber MPO trunks now even if you are only lighting 8 fibers today, and put the reach you will need in three years into the plant rather than into this year's transceiver purchase. Cable infrastructure is the longest-lived layer in the network — longer than the switches, longer than the GPUs — and it is the layer where under-buying is most expensive to correct, because correcting it means re-pulling trays through a live hall.

There is a scheduling corollary. GPU lead times run 12–16 weeks, and optical infrastructure should be ordered 90 or more days ahead of delivery; a $300 cable becomes a $100k-per-week bottleneck when GPUs sit idle waiting for it [1].

Where copper still wins, and will keep winning

A good fiber argument concedes its ground. Inside the rack, at sub-metre distances, copper is genuinely better on every axis that matters: zero power, sub-nanosecond latency, lowest cost per bit, no laser to fail, no connector to contaminate. That is why NVIDIA built the NVL72 scale-up domain in copper — binding 72 GPUs with NVLink over twinax — and why the reasoning was stated openly: doing the same job in optics would have cost roughly 20 kW more in transceivers and retimers per rack, watts that would otherwise have gone to compute [5].

The crucial nuance is that copper winning the scale-up domain did not shrink the optical market. An NVL72 rack still carries one 400G or 800G OSFP port per GPU for the scale-out network, the same ratio as the previous H100 generation [5]. Binding the inside of a rack in copper and shooting light out of it are two different networks serving two different reach requirements, and each generation moves the boundary between them a little further inward — toward the die, not away from it.

The media ladder, mapped

Once the decision is "optical," the remaining choice is which optical variant, and the naming convention encodes the answer. Match reach to link and you avoid paying for range you will never use [8][9]:

Variant	Reach	Fiber	Connector	Typical module power
800G SR8	50–100 m	Multimode OM4/OM5	Dual MPO	12–15 W
800G DR8	500 m	Single-mode (parallel)	Dual MPO-12 APC	14–17 W
800G FR8 / 2×FR4	2 km	Single-mode CWDM	Duplex LC	13–14.5 W
800G LR8 / 2×LR4	10 km	Single-mode CWDM	Duplex LC	15–18 W
800G ER8	~40 km	Single-mode	Duplex LC	Higher
800G ZR / ZR+	80–120 km+	Single-mode, coherent DWDM	Duplex LC	25–30 W

DR8 is the workhorse of AI halls: 500 m of single-mode reach covers nearly every intra-pod link, and it supports 2×400G breakout for mixed-generation fabrics [8][9]. ZR and ZR+ are a different animal — coherent transceivers for data center interconnect, where reach is a system-level figure that depends on the line system, amplification and channel spacing rather than a fixed number [9]. Note also the mechanical split: OSFP comes in IHS (finned-top) for switches and RHS (flat-top) for NICs and DPUs, and they are not interchangeable — a breakout cable ordered with the wrong ends costs five weeks, not five minutes [1][8].

The loss budget: a worked example worth copying

Reach figures in the table above assume a channel that meets its loss budget, and in a data center the budget is dominated by connectors, not by glass. Design values worth standardizing on: OS2 single-mode attenuates 0.4 dB/km at 1310 nm; OM4 multimode about 3.0 dB/km at 850 nm; a mated LC pair 0.30 dB typical (0.75 dB maximum per TIA-568); a mated MPO pair about 0.35 dB typical (0.6 dB maximum single-mode); a fusion splice 0.07–0.10 dB [10][11]. Then add a 2–3 dB safety margin for contamination, ageing, future repair splices and measurement uncertainty [10].

Link	Fiber loss	Connectors	Total	With 3 dB margin
120 m OM4 trunk, 4 MPO pairs, 0 splices	0.36 dB	1.40 dB	1.76 dB	4.76 dB
500 m OS2 (DR8), 4 MPO pairs, 0 splices	0.20 dB	1.40 dB	1.60 dB	4.60 dB
2 km OS2, 6 mated pairs, 4 fusion splices	0.80 dB	2.10 dB	3.30 dB	6.30 dB

The pattern is the point: at data center distances the glass contributes a fraction of a decibel while four connector pairs contribute more than the fiber does. Every additional cassette in the path is the difference between a link that trains at full rate and one that trains down or drops under thermal load — which is why 16-fiber MPO deployments on OM4 deserve explicit connector-count accounting in the design, not in the punch list [10][11].

What actually fails: three failure modes, one of them free to prevent

Fiber's failure profile is narrow and well understood, and one item dominates it. Roughly 70% of fiber optic link failures trace to contamination or connector issues [1] — a dust particle a micron across on a single-mode end face blocks a meaningful fraction of a 9-micron core, and the loss is invisible from outside. This is the same contamination discipline covered in detail in our piece on air cleanliness and its effect on servers: inspect and clean every connector before mating, at 200×–400× magnification, judged against IEC 61300-3-35, and treat it as the only failure mode that costs nothing to prevent.

The other two are design errors rather than wear items. Polarity: MPO trunk and breakout cables come in Method A, B and C, and mixed polarity in one pod is a classic cause of a channel that passes continuity but fails link-up — standardise on one method (Method B is the usual choice in AI builds) and verify with a tester, not by eye [1][10]. Geometry: MPO assemblies have a larger minimum bend radius than LC duplex patch cords, so routing through tight trays and behind cold plates needs planning, and exceeding it produces macro-bend loss that shows up as a marginal link at temperature rather than an outright failure.

Ten questions to put to a fiber and interconnect vendor

1. Which reach class are you quoting per link, and what is the measured channel insertion loss against the budget — not the module's datasheet budget, the channel's?
2. Are the MPO trunks Method A, B or C, and how is polarity verified at acceptance?
3. Are the DR8 connectors APC or UPC, and what happens to the warranty if an APC cable is mated to a UPC port?
4. What is the cable's outer diameter, weight per metre and minimum bend radius — and does the tray fill calculation still meet the 50% guideline at my port count?
5. For links under 3 m, what is the justification for optics over AEC — and for links over 3 m, what is the justification for AEC over optics?
6. If LPO is proposed, which host switch platforms have validated SerDes for it, and what is the fallback if interoperability testing fails?
7. What is the module power per port at my ambient, and does the switch's thermal design still hold with every port populated at that power?
8. What transceiver case temperature do you guarantee in a rack above 30 kW with the proposed cable bundles in place?
9. Is the single-mode plant rated for the next generation — will these trunks carry 1.6T without re-pull?
10. What is the delivery lead time per cable type, and what is your substitution policy if a specific module or assembly is unavailable at install date?

The short version

Fiber owns the scale-out network of an AI compute center for one physical reason and four commercial ones. Physically, copper's usable reach shrinks below the length of a single rack as lane speeds climb past 112G, so past a couple of metres there is no copper option to weigh. Commercially, fiber wins because the optical layer's power can now be engineered down instead of merely accepted, because a 3.5 mm cable occupies an eleventh of the faceplate cross-section and a fifth of the weight of the copper it replaces, because it carries no ground reference between power domains that are increasingly different by design, and because the plant you install today will carry transceivers that have not been designed yet.

None of that makes copper wrong. Copper is the correct answer inside the rack, and the industry will keep spending engineering effort — AECs, retimers, overpass assemblies — to hold that ground as long as physics allows. The skill is knowing where the boundary sits for your lane speed, your rack layout and your power budget, and specifying the fiber plant to survive the next three generations of everything you plug into it.

Planning the cabling for an AI hall or a modular compute pod — media ladder, loss budget, tray fill and acceptance testing? Request a quote and we will review the interconnect plan against your rack layout and port count before the GPUs ship.

References

1. Vitex, "800G Data Center Interconnect Selection Guide" — DAC/AEC/AOC reach, cable diameters and weights, SuperPOD cable counts, deployment mistakes. https://www.vitextech.com/blogs/blog/800g-data-center-interconnect-selection-guide
2. Vitex, "800G Thermal and Power Planning Guide: Transceivers, Cables, and Cooling" — cable diameter vs airflow, transceiver case temperature in high-density racks, 64-port power budget. https://www.vitextech.com/blogs/blog/800g-thermal-and-power-planning-guide-transceivers-cables-and-cooling
3. Broadcom, "Broadcom Delivers Industry's First 51.2-Tbps Co-Packaged Optics Ethernet Switch Platform for Scalable AI Systems" (March 2024) — Bailly 70% optical power reduction, 8× silicon area efficiency, pluggables ≈50% of switch system power and cost. https://www.broadcom.com/company/news/product-releases/61946
4. Idea2Dev, "1.6T Active Electrical Cables vs. CPO: Inside the Scale-Out Networking Bottleneck" — 224G PAM4 reach limits, AEC/LPO/CPO power per port, Cisco bandwidth-vs-power scaling 2010–2022. https://idea2dev.com/en/post/16t-active-electrical-cables-vs-cpo-inside-the-scale-out-networking-bottleneck
5. PhotonCap, "DSP, LPO, NPO, CPO: The Four Optical Architectures" — NVL72 copper scale-up decision and the ~20 kW optics figure, 224G on-PCB reach, AEC reach to 7 m, scale-up/scale-out split. https://photoncap.net/p/dsp-lpo-npo-cpo-the-four-optical
6. AscentOptics, "800G LPO: The Complete Guide to Linear Pluggable Optics" — retimed module latency ~100 ns vs LPO under 10 ns, Cisco 51.2T demonstration (~700 W), LPO vs LRO vs CPO trade-offs. https://ascentoptics.com/blog/800g-lpo/
7. Exponential Industry, "Linear Pluggable Optics: The AI Interconnect That Cuts Power Without Killing Serviceability" (September 2026) — LPO 5.5–10 W vs 14–18 W retimed, DSP ≈40% of module power, 200G EML supply constraints. https://exponentialindustry.com/blog/2026-09-22-linear-pluggable-optics-lpo-ai-data-center-buildout/
8. Nexgen, "800G OSFP in AI Data Centers: IHS or RHS" — SR8/DR8/FR/LR/ZR reach table with connector and power per variant, IHS/RHS incompatibility, LPO host platform requirements. https://odoo.nexgen.eu/blog/learning-hub-1/800g-osfp-in-ai-data-centers-ihs-or-rhs-getting-the-decision-right-18
9. ATGBICS, "800G Technology Overview" — 800G optical standards and reach objectives (SR8, DR8, FR4/FR8, LR4/LR8, ZR/ZR+) with wavelengths and media. https://atgbics.com/blogs/tech-talk/800g-technology-overview
10. NFM Consulting, "Fiber Optic Link Loss Budget: How to Calculate Before You Build" — OS2 0.4 dB/km and OM4 3.0 dB/km design values, 0.3 dB mated pair, 3 dB safety margin rationale. https://nfmconsulting.com/knowledge/fiber-optic-link-loss-budget-calculation/
11. IEEE 802.3bs contributor presentation, "Loss Budgeting for 400GE Channels" (Kolesar, 2014) — statistical basis for SM MPO (mean 0.35 dB) and fusion splice (mean 0.07 dB) insertion loss. https://ieee802.org/3/bs/public/14_05/kolesar_3bs_01_0514.pdf
12. GF Securities via Sina Finance, "CPO技术推动光模块厂商加速布局核心环节" (January 2025) — Broadcom ECOC 2024 cluster modelling: NVL576 16.2 kW → 7.1 kW, 30,528-GPU cluster 832 kW → 366 kW. https://finance.sina.com.cn/stock/relnews/cn/2025-01-21/doc-inefsyzc8772563.shtml